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Achieving Mutual Authentication with Arm Mbed TLS and a Resourced Constrained BLE Microcontroller Donnie Garcia, NXP Semiconductor show more Description To mutually authenticate two devices is a complex undertaking. The developer must understand the cryptography involved and how to establish a public key infrastructure. Thankfully, Arm Mbed TLS has all of the functionality to create and process a chain of certificates that establishes a trusted relationship between a transmitter and a receiver. This session will detail the process of creating a custom certificate, the base messages needed and the mbed TLS APIs used in devices, who authenticate based on a public key infrastructure. Session Type Conference Session Pass Type All-Access Pass Speakers Donnie Garcia NXP Semiconductor Arm, Community and Cloud: Enabling ASICs for IoT Michael Wishart, efabless corporation; Mohamed Kassem, efabless corporation; Mark Woods, Arm Inc. show more Description The emerging world of massively connected devices will be accelerated by advances in complex, mixed-signal integration through customized ASICs. Making these ASIC solutions broadly available and cost-effective, however, will require new approaches that use cloud-based collaborative development platforms and community business models. This talk will show how through secure, cloud-based platforms, all the resources and processes required to design ASICs and IP are offered in one place, enabling a worldwide network of developers and customers to collaborate, model, and verify custom SoCs. When custom SoC creation becomes less risky and more cost-effective, innovation is unleashed. Session Type Conference Session Pass Type All-Access Pass Speakers Michael Wishart efabless corporation Mohamed Kassem efabless corporation Mark Woods Arm Inc. Automated Identification of Embedded Physical Memories Using Shared Test Bus Access in IP Cores Rob Knoth, Cadence Design Systems; Teresa McLaurin, Arm show more Description Automotive, safety critical, and complex SoCs, with growing memory content, demand the use of memory built-in self test (MBIST). The manual process of binding the physical memory modules to the MBIST interfaces can be very complex and error prone. Arm and Cadence present an automated methodology that reduces the chance of field failure and ensures proper testing of the memories. Session Type Conference Session Pass Type All-Access Pass Speakers Rob Knoth Cadence Design Systems Teresa McLaurin Arm Bringing the Benefits of Cortex-M Processors to FPGA Simon George, Xilinx; Michele Riga, Arm show more Description FPGAs enable custom solutions to be created quickly and with a minimal amount of engineering effort. What if you could combine the flexibility of an FPGA with the processing and software ecosystem advantages of a Cortex-M processor? This joint Xilinx and Arm technical presentation will explore how to use Cortex-M processors in Xilinx-based FPGAs, providing guidance on all of the key steps in building a successful FPGA solution: integration, verification, synthesis, and software development, leveraging the large Arm-based software development ecosystem. Session Type Conference Session Pass Type All-Access Pass Speakers Simon George Xilinx Michele Riga Arm Improving Memory on the Edge Using Octal Serial Flash Cache Jim Bruister, Silvaco show more Description With intelligence and data processing moving to the edge, the demand for local program memory is exploding. So how do you increase the program memory on a device without significantly increasing cost and power or by limiting performance? This presentation from Silvaco, Arm, and Adesto will explore and compare the options available to developers, and will look at whether technologies, such as Execute in Place and Flash Cache, can be used to solve this problem. The technical presentation will provide real-world comparison data and make recommendations so that developers can build products that meet the demands of tomorrow’s intelligent devices. Session Type Conference Session Pass Type All-Access Pass Speakers Jim Bruister Silvaco Introduction to Arm Chris Shore, Arm show more Description If you are new to Arm or a first-time TechCon visitor, here is the place to start. Chris will give an informative overview of who Arm is and what they do, what products are available, and what applications they are suitable for, as well as how to find devices, services and tools. With lots of pointers to what to look out for in the conference and on the show floor, this is the ideal session to help you get the best out of your time at TechCon. Session Type Arm TechCon Theater Session Pass Type All-Access Pass,Arm Mbed Connect Pass,Expo Floor Pass Speakers Chris Shore Arm Minimize Development Time of Systems Using Non-Volatile Memory Samriti Sood, Arm show more Description It is well recognized that industry demand for global-embedded, non-volatile memory (eNVM) is set to be boosted by IoT applications. However, eNVM integration is a painful process for SoC designers, as they need to modify memory controllers and interface for different foundry and process technologies. To solve this problem, Arm has developed AMBA Generic Flash Bus interface standard (GFB) in collaboration with its partners. In order to focus on design innovation and not on hacking another memory controller, join this talk to learn how GFB can enable you to save development time, innovate more, and improve reusability. Session Type Conference Session Pass Type All-Access Pass Speakers Samriti Sood Arm Optimizing IoT SoC Design Around ARM PSA Abdelouahid Zakriti, Sondrel Ltd. show more Description IoT SoC design complexity has increased (high security requirements, multi-core, embedded connectivity, mixed-signal, etc.). Arm PSA helps significantly to cluster the design around a secure extendable subsystem. But there is still a level of complexity, especially for verification and coverage achievement. This white paper is a case study on how to optimize IoT SoC design around Arm SSE-200, keeping high focus on security. Session Type Conference Session Pass Type All-Access Pass Speakers Abdelouahid Zakriti Sondrel Ltd. Using Virtual Prototyping for Accurate Performance Analysis – an SSD Controller Case-Study Malte Doerper, Synopsys; Tim Kogel, Synopsys; Jason Andrews, Arm; Eric Sondhi, Arm show more Description Optimizing the performance for a complex application is a phase-coupled problem: the HW architecture needs to be optimized for SW application, and the SW needs to be optimized for HW. Virtual prototyping enables the early and joint consideration of HW and SW, across multiple teams and companies, and even before RTL of all components becomes available. This in-depth technical presentation will show the complete flow, including the creation of an accurate virtual prototype as well as the usage for SW bring-up and joint HW/SW performance optimization. The flow will be illustrated by a demonstration of a real-live SSD controller SoC. Session Type Conference Session Pass Type All-Access Pass Speakers Malte Doerper Synopsys Tim Kogel Synopsys Jason Andrews Arm Eric Sondhi Arm
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