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Tuesday, October 16
9:00am Optimizing System Performance and Power in New MCU Architectures 9:00AM - 9:50AM Gideon Intrater, Adesto Technologies show more Description Embedded flash has been a mainstay of Arm microcontrollers, but now MCU vendors are considering new memory architectures to meet performance/power requirements of emerging intelligent IoT edge devices. For example, the flashless NXP i.MX RT1050 and ST’s STM32L4+ can use external flash for eXecute-in-Place (XiP) operation. An external memory with XiP capability can help designers create IoT devices with advanced capabilities and long battery life. We’ll share results of our extensive benchmarking of power/performance of various memory architectures on the i.MX RT1050 and the STM32L4 to provide system designers with insight into choosing the right memory architecture for their application. Time Tuesday, Oct 16 9:00AM - 9:50AM Session Type Conference Session Pass Type All-Access Pass Location Executive Ballroom 210F
4:30pm Power Management in Arm-based Embedded Systems 4:30PM - 5:20PM Colin Walls, Mentor, a Siemens Business show more Description Power management in today’s embedded designs has been steadily growing as an increasing number of battery powered devices are developed. Often power optimizations are left to the very end of the project cycle. We will discuss design considerations that should be made when starting a new power-sensitive, embedded design. This will include choosing the hardware with desired capabilities; defining a hardware architecture that will allow software to dynamically control power consumption; defining appropriate power usage profiles; making the appropriate choice of an operating system and drivers; choosing measurable power goals to the software development team to track throughout the development process. Time Tuesday, Oct 16 4:30PM - 5:20PM Session Type Conference Session Pass Type All-Access Pass Location Executive Ballroom 210F
Wednesday, October 17
3:30pm 5G System Design: Challenges and Solutions 3:30PM - 4:20PM Kinjal Dave, Arm; Ray Hwang, Arm show more Description The emerging 5G cellular systems raise unprecedented challenges to support a portfolio of different use cases and service types. In this talk, we will provide an overview of 5G technology requirements, the key use cases envisioned for 5G, the system design challenges, including conflicting performance and efficiency requirements. We will also highlight possible solutions to meeting some of the design challenges posed by future 5G modem designs. Time Wednesday, Oct 17 3:30PM - 4:20PM Session Type Conference Session Pass Type All-Access Pass Location Executive Ballroom 210H
Thursday, October 18
1:30pm Intensive Image Processing on Arm (When ISP fails!) 1:30PM - 2:20PM Pannaga Bhushan Reddy Patel, Samsung RnD Institute, Bangalore; Rahul Sharma, Samsung RnD Institute, Bangalore show more Description The innovative arrangement pixels in tetracell sensors to allow enhanced light sensitivity in low-light conditions, and the data thence gathered do not lend themselves for further processing by the platform’s Image Signal Process (ISP) that expect data in Bayer format. This means that all the image enhancement algorithms, acting upon this non-standard format, have to be processed on the CPU and/or other processing elements available on the platform. Processing of big-image buffers with algorithms doing intensive processing, within a latency acceptable for successful commercial solution, is the subject of the proposal. Time Thursday, Oct 18 1:30PM - 2:20PM Session Type Conference Session Pass Type All-Access Pass Location Executive Ballroom 210G
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