Joe Hupcey III is a Verification Product Technologist for Mentor Graphics;
based in Mentor’s office in Silicon Valley, CA. At Mentor he is responsible for their formal, clock domain crossing, and reset domain crossing verification product lines.
Prior to joining Mentor, Joe has held product management and marketing roles in several Electronic Design Automation (EDA) companies, for products that covered multiple aspects of hardware and software functional verification. Before transitioning into marketing, Joe worked as an electrical engineer in FPGA design, EDA tools for FPGAs and ASICs, and ASIC verification.
Joe’s educational background includes BSEE, MSEE, and MBA degrees from Cornell University in Ithaca, NY
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