Certification, grades, functional safety, traceability are now the common terms in the semiconductor industry with the rapid expansion of electronic automotive applications. Along with these terms, we have seen the need for optimized physical IP for automotive SoC’s and a wide range of processes enabling automotive designs. The session will review the advances that have been made in Artisan physical IP for TSMC 16FFC automotive process, the new safety package deliverables, and how the upcoming Automotive POP IP can address some of the unique and stringent automotive requirements to ensure design robustness.
The session will also cover the design enablement platforms for TSMC16FFC and 7nm processes. We will describe the design collaterals delivered with each platform, including automotive-specific technology files, PDKs, design flows, and foundation IP. We will also go over the availability and roadmap of interface and other IP from IP Alliance partners for these 2 processes.