Agenda

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Optimizing System Performance and Power in New MCU Architectures

  • Gideon Intrater, Adesto Technologies

Embedded flash has been a mainstay of Arm microcontrollers, but now MCU vendors are considering new memory architectures to meet performance/power requirements of emerging intelligent IoT edge devices. For example, the flashless NXP i.MX RT1050 and ST’s STM32L4+ can use external flash for eXecute-in-Place (XiP) operation. An external memory with XiP capability can help designers create IoT devices with advanced capabilities and long battery life. We’ll share results of our extensive benchmarking of power/performance of various memory architectures on the i.MX RT1050 and the STM32L4 to provide system designers with insight into choosing the right memory architecture for their application.

  • Date:Tuesday, October 16
  • Time:9:00 AM - 9:50 AM
  • Location:Executive Ballroom 210F
  • Session Type:Conference Session
  • Room:Executive Ballroom 210F
  • Pass Type:All-Access Pass
Speakers
Gideon Intrater
Adesto Technologies