Automated Identification of Embedded Physical Memories Using Shared Test Bus Access in IP Cores

  • Rob Knoth, Cadence Design Systems, Inc.,
  • Teresa McLaurin, Arm

Automotive, safety critical, and complex SoCs, with growing memory content, demand the use of memory built-in self test (MBIST). The manual process of binding the physical memory modules to the MBIST interfaces can be very complex and error prone. Arm and Cadence present an automated methodology that reduces the chance of field failure and ensures proper testing of the memories.

  • Date:Tuesday, October 16
  • Time:2:30 PM - 3:20 PM
  • Location:Executive Ballroom 210F
  • Session Type:Conference Session
  • Room:Executive Ballroom 210F
  • Pass Type:All-Access Pass
Rob Knoth
Cadence Design Systems, Inc.
Teresa McLaurin