CCIX: Seamless Data Movement for Accelerated Applications

  • Jon Masters, Red Hat,
  • Millind Mittal, Xilinx,
  • Jeff Defilippi, Arm

During Arm TechCon 2017, members of the CCIX consortium provided an introduction to the chip-to-chip interconnect architecture, which was created to solve the performance and efficiency challenges of emerging acceleration applications, such as machine learning, network processing, storage/memory expansion, and analytics that combine processing and acceleration.

At this year’s talk, CCIX members will not only focus the advancements to the hardware and software architecture. This talk will also detail the use cases that benefit from the cache coherent, shared virtual memory paradigm and seamless data movement between processors and accelerators, including FPGAs, GPUs, network/storage adapters, intelligent networks, and custom ASICs.

  • Date:Wednesday, October 17
  • Time:9:00 AM - 9:50 AM
  • Location:Executive Ballroom 210G
  • Session Type:Conference Session
  • Room:Executive Ballroom 210G
  • Pass Type:All-Access Pass