Using the Arm Cortex-M Memory Protection Unit (MPU) with an RTOS

  • Jean J Labrosse, Silicon Labs

A Memory Protection Unit is hardware that limits the access to memory and peripheral devices to only the code that needs to access those resources. An MPU allows an application developer to create more robust, safe and secure applications. The application can be organized by processes, each having access to its own memory and peripheral space.

I will show how an MPU, as found in the Cortex-M (v7M and v8M), can interact with an RTOS and what recourses an RTOS has when a memory or I/O access violation is detected.

  • Date:Tuesday, October 16
  • Time:3:30 PM - 4:20 PM
  • Location:Executive Ballroom 210H
  • Session Type:Conference Session
  • Room:Executive Ballroom 210H
  • Pass Type:All-Access Pass
Jean J Labrosse
Silicon Labs